QA Hardware Engineer 3 - Physical Layer (L0/L1)

Summary: VIAVI (NASDAQ: VIAV) has a 100+ year history of technical innovations that have evolved to keep pace and address our customers’ most pressing business issues. We make equipment, software, and systems that help to plan, deploy, certify, monitor, and optimize all kinds of networks - like those for mobile phones, service providers, large businesses and data centers. VIAVI is also a leader in high performance thin film optical coatings and engineered diffusers, providing light management solutions to anti-counterfeiting, consumer electronics, automotive, defense and instrumentation markets.

We are the people behind the products that help keep the world connected – at home, school, work, at play, and everywhere in between. VIAVI employees are fierce about supporting customer success and we welcome people who bring their best every day to the company - to question, to collaborate and to push for solutions that will delight our customers.

Duties & Responsibilities:

Validate Ethernet physical layer hardware interface behavior: link negotiation, signal integrity, link state transitions and counters, optical transceiver operation.

Reproduce and root-cause hardware and firmware defects through systematic test isolation at the PHY level.

Build and maintain lab test setups including optical and copper interfaces (OSFP, QSFP-DD).

Analyze test failures, capture logs, and document defects with clear reproduction steps in the issue tracker.

Collaborate closely with hardware, software and application dev teams to triage failures and drive quality improvements.

Define and review long-term, performance, and scalability test scenarios for physical-layer components.

Derive test requirements from hardware validation reports and functional test specifications.

Contribute to CI/CD test integration for automated regression coverage of physical-layer test suites.

Pre-Requisites / Skills / Experience Requirements:

Engineering Profile:

Degree in electrical engineering, computer science or equivalent work experience.

Practical experience of H/W bring-up and troubleshooting of high-speed hardware interconnects.

Familiarity with test and measurement tools: protocol analyzers, oscilloscopes, BERT testers.

Experience and understanding of the Ethernet L1 Physical layer.

Understanding of the Ethernet L2 Data Link/MAC layer.

Experience with managed Ethernet transceivers.

Experience with Python scripting for API automation.

Fluent English & German language skills.

Deep knowledge of IEEE802.3, high-speed Ethernet (100GE+) and transceivers, PCS/FEC constitutes an advantage.

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